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Setting generics/parameters in Xilinx ISE/Vivado

Xilinx Vivado

Once you've loaded in your design, set the generics by clicking the button Synthesis Settings.
Go to the menu option 
Synthesis Settings and click on More Options. You can now set the generics for your entity as you can see from the following screen shot (do not use white spaces inside the generic definition, as nbits = 4, type nbits=4 instead):

Of course you can also use Tcl as we recommend, and include in your synthesis script the following lines 

  synth_design -generic nbits=4
synth_design -generic maxcount=10

Xilinx ISE

In Xilinx ISE, set up your project and import or edit your code.
To do this, carry out the following steps:

  • Right-click on Synthesize - XST and select Properties

  • Highlight the Category Synthesis Options in the left of the form

  • Set the Properties Display Level to Advanced

  • Now you will be able to type in your generic/parameter settings - see the following screenshot.

The syntax is a space separate list of assignments such as nbits=4 maxcount=10.

In Xilinx Tcl, the following command has been created:

project set "Generics, Parameters" "nbits=4 maxcount=9" -process "Synthesize - XST"

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