FPGA Solutions

proprietary FPGA IP CORES


We develop and sell our proprietary FPGA IP CORES, vendor independent, optimized in terms of speed, power and resource usage for our customers to easily integrate into their own systems. We customize our IP cores and design new ones to respond to our Customers’ needs. We offer: more than 115 IPs, 7 different libraries, 110 000 lines of code with 40 000 lines of comments.
The IPs vary from simple to complex functions, and are ready to use configurable systems, from simple FIFO IP Cores, up to a complete ready to use ATA Over Ethernet Bridge IP.

IP Cores Key Features

• Vendor independent “off the shelf” VHDL IP cores for FPGAs (Xilinx, Altera, Lattice and Microsemi)
• Optimized in terms of speed, power and resource usage
• Architected, developed, verified, released and maintained through a rigorous and efficient process
• DO-254 and IEC-61508 V&V support available on request
• Factory adjustable parameters and parallelism
• MATH and DSP Cores can be supplied both in fixed point and in floating point
• VHDL-2008 support available on request
• AXI Wrapper available on request


• Encrypted source code (maximum reusability among multiple targets)
• Synthesized netlist (lowest cost, targeted at a single FPGA, low cost respin to other targets)
• functional VHDL self-checking testbench, for DSP modules, a golden reference floating point and a bit accurate fixed point models
• Full set of documentation
• Verification and Validation Procedure suitable for safety critical applications (optional)


FIFO (Sync/Async, FWFT...) || Register Bank (AXI4LITE, AHB) || Cross Clock Domain Modules || Tick Generator || Clock Generator || Elapsed Time Counter || Debouncer || RAM (Single/Dual port and clock) || Bitsum || Utility Package || Pulse Stretch || Encoder/Decoder || Delay (SRL, RAM, Fixed, Variable) || And others


Floating Point Math || Fixed Point Math || PID Fixed/Floating || CORDIC || Integer Math || Complex Multiplexer || PWM Random Number Generator || Interpolation || Mean || Distance (Euclidean/Statistical) || Adder Tree || Math Package || And others


Time Domain Beamforming || Pulse Compressor || (Super Sample Rate) || Overlap-Add || Range - Doppler || MTI Filtering || CFAR || Frequency Domain Beamforming || Radar Waveform Generator (CW, Chirp, Barker, arbitrary) || And others


Super sample rate modules || FFT(serial/parallel, DIF/DIT) || Polyphase Filter Bank || Channelizer || DDC/DUC || IIR CIC || Waveform Generator || DDS || White Noise Generator || Windowing || And others


Ethernet MAC || SATA || Ata Over Ethernet (AoE) || UART (run time programmable) || SPI || I2C || CAN || MIL-STD 1553 || ARINC-429 || CRC || AXI Wrappers available for all modules || And others


H264 || Image stabilizer || Sobel || Blob Extraction || Connected Component Labeling || Overlay || Erosion/Dilation Scaler || Rank filter || Canny || Segmentation || Crop || RGB2HSV, RGB2GRAY || Row/Window buffers || And others


FT2232 || ADS7953 || AD7450 || LT-2323 || ADT7310 || SRAM generic || SPI Flash MCP23S17 || MCP4821 || MAX31855 || SHT75 || ISD2353 || AD7476 || ADS5481 || And others