HDL tools
This is a collection and a list of links of public-domain HDL tools for digital design.
IDEs - Integrated Development Environments
These IDEs integrate few, or all, of the following features in an integrated development environment: project management, editing, linting, simulation and synthesis.
A free version of the IDE is available. For small VHDL files (less than 200 statements), all features from Sigasi Pro are available. For larger projects it will work in baseline mode. If you work within the Eclipse environment it is a good and fast editor. It contains an VHDL parser and compiler that runs transparently in the background. No support for the Verilog language at the moment (except syntax coloring).
The Web Edition is a free version of Xilinx ISE that can be downloaded at no charge. This edition provides synthesis and programming for a limited number of Xilinx devices. It includes a lite version of Xilinx ISim simulator
The Web Edition is a free version of Quartus II that provides compilation and programming for a limited number of Altera devices. A Modelsim Altera Starter Edition ofthe popular Mentor Graphics Modelsim simulatorcan be downloaded for free
Lattice Diamond is the new logic design environment for Lattice FPGA products. In the free edition it includes support for a limited number of Lattice devides. A Lattice only version of the mighty Synopsys Synplify synthesizer and of Aldec Active-HDL simulator are included.
Libero SoC manages the entire Actel design flow. In its free version (called Gold Edition) it supports a limited number of Actel devices. It includes an Actel only version of the mighty Synopsys Synplify synthesizer and of Mentor Graphics Modelsim simulator. For DSP design an Actel only version of Synopsys ModelCompiler is available.
Achronix provides ACE together with an Achronix-optimized version of either Synopsys Synplify-Pro or Mentor Graphics Precision Synthesis. No simulator is included in the ACE version released by Achronix at the moment.
Text editors
Probably the best editor for VHDL. The VHDL mode in an incredible enhancement to Emacs that lets you type better and faster. It is fully customizable, full of predefined and ready to use templates and it includes all feature of the GNU Emacs editor (integrated version control management, makefile generation and simulator link).
Emacs with Verilog Mode
Here again... Probably the best editor for Verilog. It provides context-sensitive highlighting, auto indenting, and provides macro expansion capabilities to greatly reduce Verilog coding time. It supports AUTOs and indentation in Emacs for traditional Verilog (1394-2005), the Open Verification Methodology (OVM) and SystemVerilog (1800-2005/1800-2009).