Campera Electronic Systems| Simplifying FPGA Complexity

ASIP & Matlab High Performance FPGA IP Core	Slow FPGA? No initial cost, +20% speed!	Math Library v. 2015.1 Released. Fixed & floating point.
Utility Library v. 2015.1 Released. Improve productivity!

Video Processing Solutions address high resolutions, high frame-rates and ultra low-latency demanding applications

The CES Radar Processing Library is a set of fully programmable DSP Units optimised for radar applications

A unique mixture of know-how, from DSP up to HDL, alongside a vast and fully verified collection of HDL IP cores

Latest Blog Posts

VHDL 2008: a powerful unexplored language

VHDL has the powerful feature of generics, while Verilog uses parameters for the same purpose. Both these techniques allow parameterisable designs, th...

Setting generics/parameters for Synthesis

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Simplifying FPGA Complexity

ASIP & Matlab

High Performance FPGA IP Core

Slow FPGA?

No initial cost, +20% speed!

Math Library

v. 2015.1 Released. Fixed & floating point.

Utility Library

v. 2015.1 Released. Improve productivity!

Video Processing

Radar/Sonar Processing

HDL Design Services

Latest Blog Posts